Lead semiconductor IC test engineering for an AI accelerator.
•Lead semiconductor IC test engineering for an AI accelerator, owning subcontracted test development, team leadership, and delivery of high-volume test solutions across digital, memory, and high-speed interfaces.
•Key Responsibilities Define and drive manufacturing test strategy and test architecture for advanced AI accelerator chips.
•Manage and mentor a team of test engineers and oversee subcontracted test development partners.
•Lead ATE-based silicon bring-up, debug, characterization, and yield improvement activities.
•Develop test content for DFT, memory, HSIO, and advanced packaging scenarios.
•Requirements 8+ years in semiconductor test engineering with leadership experience.
•Experience with ATE platforms (e.g., Advantest, Teradyne) and test program development.
•Strong knowledge of DFT, memory testing, and high-speed interface testing.
•Experience managing external OSATs or test development partners.