Hardware Validation and Debug Engineer - DDR
GraphcoreAI & company
Bristol, United KingdomMid
Baillie Gifford
SoftBank Group
Ontario Teachers' Pension Plan
Fidelity International
Schroders
Draper Esprit
About the role
TL;DR
Hardware validation and debug engineer focusing on LPDDR5 memory and platform interfaces.
- •Work on bring-up, validation and debug of Graphcore silicon and system platforms with a focus on high-speed memory (LPDDR5) and platform interfaces.
- •Key Responsibilities Perform validation and debug for new hardware platforms and bring-up documentation.
- •Debug PCB, power, signal integrity, and high-speed memory interface issues (LPDDR5-9600).
- •Support initialization, training, timing optimization, margin analysis and stability validation.
- •Create test procedures, debug reports and drive cross-team issue resolution.
- •Requirements Hands-on hardware debug and board bring-up experience.
- •Experience with LPDDR5 memory subsystems, validation and tuning.
- •Signal integrity analysis, DDR training and margin analysis skills.
- •Ability to use lab instrumentation (oscilloscopes, BERT, VNA/TDR) and work independently.
Domain expertise
deeptechaerospace