TL;DR
Work on DFT for a large multi-core AI accelerator SoC.
- •Work on DFT for a large multi-core AI accelerator SoC, focusing on scan, ATPG and memory test to deliver robust, scalable test solutions and support silicon bring-up.
- •Key Responsibilities Contribute to DFT architecture for multi-core AI accelerator SoC Implement scan insertion, compression, and test logic; integrate DFT into EDA flow Generate and analyse ATPG patterns and support MBIST for embedded memories Develop scripts and automation to improve DFT workflows and support silicon bring-up Requirements Degree in Electrical/Computer Engineering or similar Experience in DFT, digital design or ASIC development Good understanding of scan, ATPG, memory BIST and digital test concepts Familiarity with mainstream EDA tools and scripting (Python, Tcl)
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