Package & SI/PI - Signal and Power Integrity Engineer
EliyanChiplet Interconnects company
Bay AreaSenior
Intel Capital
Tiger Global Management
Seligman Ventures
Cisco Investments
Lumentum
Micron
About the role
TL;DR
Provide packaging solutions for chiplet interconnects in a fast-paced startup.
- •Join the leading chiplet startup from the ground floor! As a Signal and Power Integrity Engineer, you will provide packaging solutions for chiplet interconnects.
- •Key Responsibilities Working closely with analog circuit designers to understand and define IO requirements co-designed with the channel Responsible for pre-layout and post layout channel simulation and optimization to achieve the best performance Using driver/receiver models to run transient channel simulation, inspect eye diagrams, and improve the performance Requirements Expertise in signal integrity and power integrity simulation methodologies Experience with simulation tools such as HFSS, Q3D, Siwave, PowerDC, PowerSI, ADS, Spectre, HSPICE, Allegro Knowledge of using lab equipment such as Vector Network Analyzer, Spectrum Analyzer, High-Frequency Oscilloscope BS degree in EE or equivalent, with 5 years of experience Will not relocate for this role a this time and onsite required
Benefits & perks
excellent benefits